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MICROPROCESSOR an enhanced version of 8085Microprocessor that was

MICROPROCESSOR TECHNIQUES LAB ASSIGNMENT: 1

STUDY OF 8086 MICROPROCESSOR

 

ARCHITECTURE OF
8086:

8086
Microprocessor is an enhanced version of 8085Microprocessor that was designed
by Intel in 1976. It is a 16-bit Microprocessor that has 20 address lines and16
data lines that provides up to storage of 1MB.The lower 16bit address lines are
multiplexed with the 16bit data lines. Since there are 20bit address lines,
8086 can access up to 1GB of physical memory. It consists of powerful
instruction set, which provides the ease of performing operations like
multiplication and division. Also microprocessors do not have inbuilt memory.
Princeton architecture is used for microprocessors where data and program
memory are combined in a single memory interface.

Internal Architecture Of 8086

The
architecture of 8086 is divided into two units: 1) Bus Interface Unit (BIU)

                                               
                            2) Execution Unit (EU)

BUS INTERFACE
UNIT (BIU):

·       The Bus Interface unit provides the interface between the
microprocessor and the external memory (RAM/ROM).

·       BIU generates 20bit physical memory address.

·       BIU is responsible for transferring all the data and addresses on
the buses.

·        It is also responsible for
fetching instructions from the memory, reading data from the ports, as well as
writing data to the ports and the memory.

·       Functional parts of BIU:

 

1.INSTRUCTION QUEUE:

-BIU contains
the instruction queue.

-BIU gets up to
6 bytes of next instruction in advance and stores it in the instruction queue.

-When the
Execution Unit (EU) is ready to execute the next instruction it directly                                                       reads the instruction from the
instruction queue.

– It helps to
speed up the execution as the EU need not wait for the external   memory to send the instruction.

– The process
of fetching the next instruction while the current instructions executes is
called Pipelining.

 

2.    
SEGMENT
REGISTER:

-Segment
Register holds the addresses of instructions and data in the memory.

-These
addresses are used by the processor to access memory locations.

-Segment
Registers also contains 1 pointer register IP, which holds the address of the
next instruction to be performed by the EU.

-BIU has 4
segment buses:  i.e. CS, DS, SS & ES.

-CS: It stands for Code Segment.
It is used for addressing a memory location in the code segment of the memory,
where the executable program is stored.

-DS:
It stands for Data Segment. It consists the date used by the program.

-SS:
It stands for Stack Segment. It handles the memory to store data during
execution.

-ES:
It stands for Extra Segment. It is the additional data segment used by
string to hold extra destination data.

 

3.     INSTRUCTION
POINTER (IP) :

-It is a 16 bit
register used to hold the address of the next instruction to be executed.

-The value stored in Instruction
Pointer is referred to as “offset”.

 

EXECUTION UNIT (EU):

·       It gives instructions to BIU stating from where to fetch data and
then decode and execute the instructions.

·       It also controls the operations on the data and uses instruction
decoder and ALU to do the same.

·       EU has no direct connection with the system buses.

·       Operations are performed over data through BIU.

·       Functional parts of EU are:

   

1.    
ALU:

-Handles all the arithmetic and logical operations like
addition(+),subtraction(-), multiplication(*),division(/),AND,OR,NOT.

 

2.    
FLAG REGISTER:

-It is a 16bit register which behaves like a flip-flop.

-It changes its result according to the result stored in the
accumulator.

-There are 9flags divided into 2 groups i.e. a) Conditional flags

                                                                     
b) Control flags

 

3.    
CONDITIONAL
FLAGS:

-Shows the result of the last arithmetic or logical instruction
executed.

-There are 6 Conditional Flags mentioned as follows:

– Carry
Flag: Indicates an overflow condition for arithmetic operations.

– Auxiliary
Flag: The processor uses this flag to perform binary to BCD   conversion.

– Parity
Flag: Used to indicate the parity of the result. When
the lower order 8-bits of the result contains even
number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity
Flag is reset.

-Zero Flag: The flag is set to 1 when the result of arithmetic or logical
operation is zero or else it is set to zero.

– Sign Flag: This flags holds the sign of the result. When the result is
negative it is set to 1 else set to 0.

-Overflow
Flag: Flag represents the result when the system capacity is exceeded.

 

4.    
CONTROL FLAGS:

-Controls the operations of the Execution Unit.

-There are 3 types of Control Flags:

-Trap Flag: Used for
single step control and also allows the user to execute one instruction at the
time for debugging.

-Interrupt Flag: It is
and enable/disable flag.  Use to
allow/prohibit the interruption of a program. For interrupt enabled condition
it is set to 1 or else set to 0.

-Direction Flag: Used in
string operation. Set the string bytes from higher memory access to the lower
memory address or vice-a-versa.

 

5.    
GENERAL PURPOSE
REGISTER:

-There are 8 General Purpose Registers.

-They are: AH, AL, BH, BL, CH, CL, DH and DL.

-The registers individually stores 8-bit data and are used in pairs
to store 16bit data.

-It is as a paired referred as AX, BX, CX and DX.

-AX Register: Known as
Accumulator Register and used to store operands for arithmetic operations.

-BX Register: Known as
Base Register and stores the starting base address of the memory area within
the data segment.

-CX
Register: Referred as Counter. Used in loop
instruction to store loop counter.

-DX Register: Used to
hold I/O port address for I/O instruction.

 

6.    
STACK POINTER:

-A 16bit Register holds the address from the start of the segment
to the memory location.

-The most recent word is stored on the stack.